The ACM sponsored TAU series of workshops provide an informal forum for practitioners and researchers working on temporal aspects of digital systems to disseminate early work and engage in a free discussion of ideas. The twenty-fifth in the TAU series, the TAU 2018 workshop emphasizes novel aspects of timing and power analysis as well as optimization with special invited talks.
News/Announcements
*** Registration is open! Register on the logistics page here
Special sessions, keynotes and invited talks in TAU 2018
* TAU'18 will be held at Monterey Marriot on 3/15-16, 2018. Registered attendees come from Academia, EDA, design houses, foundries, including UIUC, UC Berkley, Univ. of Utah, Kyoto Univ. (Japen), NCT Univ. (Taiwan), AMD, Analog Devices, ARM, Broadcom, IBM, Intel, Inphi, MediaTek, Qualcomm, Renesas, Samsung, TI, TSMC, Xilinx, Synopsys, Cadence, Ansys, CLKDA, Arcadia. (see pictures)
Special sessions, keynotes and invited talks in TAU 2018
(in program order) |
Title: Variation-Tolerant Adaptive and Resilient Designs in Nanoscale CMOS(abstract) by: Vivek De Intel Fellow |
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Title: DvD impact on timing and taking advantage of timing information to optimize power grid design by: Joao Geada Chief Technologist Ansys Inc. USA |
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Title: Software Acceleration with FPGA co-processing?(abstract) by: David Munday Senior Manager, Data Center Acceleration Engineering Intel |
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Title: Make STA Accurate and Great Again! An in depth discussion of accuracy and runtime trade-offs(abstract) by: Igor Keller Distinguished Engineer Cadence Design Systems |
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Title: Advances in the use of Graph Databases to Aid in the Timing Analysis
of the World's Fastest Microprocessors(abstract) by: Kerim Kalafala IBM IBM Master Inventor |
TAU 2018 is organizing a timing contest. The TAU 2018 contest will focus on the reporting capabilities of a timing tool. The specific objective is to build a runtime and memory efficient timing path enumeration and reporting capability which allows user to generate top N critical timing reports on a specific cone of logic. Winners of the contest will be awarded plaques as well as cash prizes!
Conference organizers
- General chair: Tom Spyrou (Intel)
- Technical program chair: Song Chen (Synopsys)
- Past general chair: Qiuyang Wu (Synopsys)
- Contest chair: George Chen (Intel)
