TAU 2021 Workshop has ended.
The ACM sponsored TAU series of workshops provide an informal forum for practitioners and researchers working on temporal aspects of digital systems to disseminate early work and engage in a free discussion of ideas. The twenty-seventh in the TAU series, and on its 31st anniversary, the TAU 2021 workshop emphasizes novel aspects of timing and power analysis as well as optimization with special invited talks.
Message from TAU chair committee
Thank you for attending the Tau 2021 workshop. It has been an exciting year in timing analysis, with progress in timing asynchronous circuits, harnessing GPU computing, and tackling age old problems in reliability.
We have also moved online, a change which has made the workshop more accessible to many overseas. Nevertheless, challenges remain. The online format is much more taxing to our attendees in Asia, and many have asked for a return to the in-person format where we can meet with others in our field. Perhaps, in future we will do both.
Over the last 32 years, the workshop has had its highs and lows, with this year's registration count near our historical mean, median, and the 1st event's count of ~50 people from around the world -- not bad while in the midst of a global pandemic.
As always, Tau remains a forum where academia and industry come together. We rely on your support for talks that are volunteered, papers that are submitted, contests that are run, and committees that are formed. Also, as a smaller workshop, you are free to submit here for a review by your peers and then to publish at a later date in a conference or journal.
So thank you for attending and please do consider contributing to Tau in 2022. There are opportunities for everyone
Keynotes, special sessions, and invited talks in TAU 2021
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Keynote: ASTA for Cyclic and Asynchronous Circuits (abstract) by: Christos Sotiriou University of Thessaly |
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Title: Simultaneous Multi Voltage Analysis with Dynamic Voltage Frequency Scaling (abstract) by: Paul Berevoescu Synopsys |
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Title: Robust Rare Circuit Failure Detection using Data-Efficient Machine Learning (abstract) by: Peng Li University of California, Santa Barbara |
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Title: The OpenROAD Project : Goals, Demo, and Code Organization (abstract) by: Tom Spyrou University of California, San Diego |
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Keynote: Use of AI/ML in Engineering Simulation (abstract) by: Prith Banerjee Ansys |
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Title: Aging Timing Signoff Solutions for Automotive and IoT Applications (abstract) by: Siddharth Sawant Global Foundries |
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Title: Efficient Parasitic Interconnect Insertion for Timing Analysis (abstract) by: Ron A. Rohrer Southern Methodist University |
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Title: The Evolution, Pitfalls, and Cargo Cult Engineering of Advanced Digital Timing Sign-off (abstract) by: Christian Lutkemeyer Inphi |
Timing Contest
Please refer to the contest site for the latest updates.Conference organizers
- General chair: Paul Pereira (Qualcomm)
- Technical program chair: Jignesh Shah (Intel)
- Past general chair: João Geada (ANSYS)
