Get rid of nonsens from optimization and analysis

Abstract

You read it right, it’s not a typo in the title! We present an open and interoperable sensitivity (sens for short) library for modeling of advanced effects such as process-drift, corner reduction, layout-dependent effects, aging, Vt-skew, etc. for optimization, timing, and power analysis. These effects can no longer be just derated in advanced technology nodes without loss in power, performance, or area. Accurate modeling requires detailed data for timing and power change due to parametric shifts (threshold voltage, mobility, Idsat, capacitance, etc.) caused by such effects. Sensitivity library captures such information, and it has been collaboratively designed with multiple foundry partners, customers, and EDA vendors for interoperability across digital design and analysis tools. We also propose low-cost sensitivity lib characterization solution and will demonstrate value for multiple use cases. Sens lib is designed to get rid of nonsense (pun intended!) from optimization and analysis.

Biography

Chirayu Amin is a Sr. Software Architect in Cadence Digital Signoff Group and works on advanced modeling for timing analysis and cell library characterization. Chirayu has 20 years of industry experience in EDA for digital and analog circuit analysis. He holds a PhD in ECE from Northwestern University. At Cadence, Chirayu’s most recent contributions are in modeling and analysis for important physical effects impacting timing of digital chips.